| PART |
Description |
Maker |
| EDJ1116EJBG-JS-F EDJ1108EJBG-JS-F EDJ1116EJBG-GN-F |
Differential clock inputs
|
Elpida Memory
|
| SSTL16857 SSTL16857DGG |
14-bit SSTL_2 registered driver with differential clock inputs
|
NXP Semiconductors
PHILIPS[Philips Semiconductors]
|
| MC10H109FNR2 MC10H131 MC100EP140 MC100E155FN MC100 |
Dual 4-5-Input OR/NOR Gate
Dual Type D Master-Slave Flip-Flop
3.3V ECL Phase-Frequency Detector
5V ECL 6-Bit 2:1 Mux Latch
5V ECL Differential Data and Clock D Flip-Flop
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V ECL 1:15 Differential ÷1/÷2 Clock Driver
ECL/TTL Clock Driver
3.3V / 5V 2-Input Differential AND/NAND
5V ECL 2:1 Multiplexer
3.3V / 5V ECL JK Flip Flop
3.3V ECL 1:4 ÷ 1/÷ 2 Clock Fanout Buffer
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V 10-bit LVTTL/LVCMOS to LVPECL Translator
Dual 2-Bit Adder/Subtractor
|
ON Semiconductor
|
| MAX9310A MAX9310AEUP MAX9310AEUP-T MAX9310AEUPT |
1:5 Clock Driver with Selectable LVPECL Inputs/Single-Ended Inputs and LVDS Outputs LOW SKEW CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
|
MAXIM - Dallas Semiconductor
MAXIM[Maxim Integrated Products]
Maxim Integrated Products, Inc.
|
| MC100LVE222 MC100LVE222FAR2 ON0511 MC100LVE222FA |
0.345A, 2.7-5.5V Quad (2In/ 4Out) Hi-Side MOSFET, Fault Report, Act-Low Enable 16-SOIC 0 to 85
Low Voltage 1:15 Differential ±1±2 ECL/PECL Clock Driver
From old datasheet system
MARKING DIAGRAM
Low Voltage 1:15 Differential 12 ECL/PECL Clock Driver
Low Voltage 1:15 Differential ÷1÷2 ECL/PECL Clock Driver
|
ONSEMI[ON Semiconductor]
|
| NB6L23906 NB6L239MNR2G NB6L239 NB6L239MN NB6L239MN |
2.5V / 3.3V Any Differential Clock IN to Differential LVPECL OUT /1/2/4/8, /2/4/8/16 Clock Divider
|
ONSEMI[ON Semiconductor]
|
| SI5330A-A00200-GM SI5330A-A00202-GM SI5330F-A00216 |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs
|
Silicon Laboratories
|
| MAX9320EUA-T MAX9320AEKA-T |
2.25 V to 3.8 V, 1:2 differential LVPECL/LVECL/HSTL clock and data driver
1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers 9320 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
|
MAXIM - Dallas Semiconductor
Maxim Integrated Products, Inc.
|
| MC100ELT23 MC100EL12DTR2 MC10H131FNR2 MC100H640FNR |
5V Dual Differential PECL to TTL Translator
5V ECL Low Impedance Driver
Dual Type D Master-Slave Flip-Flop
ECL/TTL Clock Driver
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V / 5V ECL ÷4 Divider
Quad 2-Input NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V / 5V Triple ECL Input to LVPECL/PECL Output Translator
|
ON Semiconductor
|
| MAX9320A MAX9320 MAX9320EUAT |
1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
1:2 Differential LVPECL/ LVECL/HSTL Clock and Data Drivers
|
Maxim Integrated Products, Inc.
MAXIM - Dallas Semiconductor
|
